DM9008F View Datasheet(PDF) - Davicom Semiconductor, Inc.
Part Name
Description
MFG CO.
'DM9008F' PDF : 68 Pages View PDF
Prior to transmission, TPSR and TBCR0, TBCR1 must be
initialized. To initiate transmission of the packet, the TXP bit in
the Command Register is set. The Transmit Status Register
(TSR) is cleared and DM9008 begins to transmit data from
memory (unless the ENC is currently receiving). If the
interframe gap has timed out, ENC will begin transmission.
Collision Recovery
During transmission, Buffer Management logic monitors the
transmit circuitry to determine whether a collision has
occurred. If a collision is detected, the Buffer Management
logic will reset the FIFO and restore the Transmit DMA pointers
for retransmission of the packet. The COL bit will be set in TSR
and NCR (Number of Collisions Register) will be incremented.
If 15 successive retransmissions each result in a collision, the
transmission will be aborted and the ABT bit in TSR will be set.
Note: NCR reads as all zeroes if excessive collisions are
encountered.
Transmit Packet Assembly Format
The following diagrams describe the format for assembling
packets prior to transmission for different byte ordering
schemes. The various formats are selected in the DCR.
D15
D8 D7
D0
DA1
DA3
DA5
SA1
SA3
SA5
T/L1
DATA1
DA0
DA2
DA4
SA0
SA2
SA4
T/L0
DATA0
BOS=0, WTS=1 in DCR
This format is used with Series 32000 808X-type processors.
DM9008
ISA/Plug & Play Super Ethernet Contoller
D15
D8 D7
D0
DA0
DA2
DA4
SA0
SA2
SA4
T/L0
DATA0
DA1
DA3
DA5
SA1
SA3
SA5
T/L1
DATA1
BOS =1, WTS = 1 in DCR
This format is used with 68000-type processors.
D7
D0
DA0
DA1
DA2
DA3
DA4
DA5
SA0
SA1
BOS = 0, WTS = 0 in DCR
This format is used with general 8-bit CPUs.
Loopback Diagnostics
Three forms of local loopback are provided on the DM9008.
The user has the ability to loop back through the deserializer
on the ENC, through the ENA, and to the co-ax to check the
link via the transceiver circuitry. Because of the half duplex
architecture of DM9008, loopback testing is a special mode of
operation.
Final
43
Version: DM9008-DS-F02
November 30, 2000
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