DSCX-V34LF-066 View Datasheet(PDF) - Conexant Systems
Part Name
Description
MFG CO.
DSCX-V34LF-066
Conexant Systems
'DSCX-V34LF-066' PDF : 82 Pages View PDF
CX86500 SCXV.xx Modem Data Sheet
Table 3-4. CX86500 Modem 38-Pin TSSOP with Serial Interface Hardware Signal Definitions
Label
XTLI
XTLO
Pin
3
4
SCLKSEL#
20
RESET#
5
VDD_CORE
VDD
GND
LPO
DSPKOUT
32
9, 10, 30
1, 14, 33,
38
31
36
PWRCLKP
34
PWRCLKN
35
DIB_DATAP
25
DIB_DATAN
26
NVMCLK/PARIF 13
NVMDATA
29
I/O I/O Type
Signal Name/Description
System
I
Ix
Crystal Oscillator Input. Connect XTLI to a 28.224 MHz or 27.000 MHz
crystal or clock oscillator circuit. (See SCLKSEL# pin description.)
O
Ox
Crystal Oscillator Output If XTLI is connected to a 28.224 MHz or
27.000 MHz crystal circuit, also connect XTLO to the crystal circuit; if
XTLI is connected to a 28.224 MHz or 27.000 MHz clock oscillator
circuit, leave XTLO open.
I
Ipu/O2
Clock Frequency Select. Clock frequency is selected by SCLKSEL#
during reset processing. Leave open for 27.000 MHz operation; connect
pin to digital ground (GND) for 28.224 MHz operation.
I
Ipu/O2
Reset. The active low RESET# input resets the modem logic and clears
the internal SRAM.
RESET# low holds the modem in the reset state; RESET# going high
releases the modem from the reset state. After application of VDD,
RESET# must be held low for at least 15 ms after the VDD power
reaches operating range. The modem device set is ready to use 25 ms
after the low-to-high transition of RESET#.
O
PWR
Core Supply Voltage. Internal +1.8 V core voltage for decoupling. Do
not connect this pin to an external +1.8 V power supply.
I
PWR
Digital Supply Voltage. Connect to +3.3V.
I
GND
Digital Ground. Connect to digital ground (GND).
I
Rx
Low Power Oscillator. Connect to +3.3V through 240 KΩ.
Speaker Interface
O
Ipd/O2
Modem Speaker Digital Output. The DSPKOUT digital output reflects
the received analog input signal digitized to TTL high or low level by an
internal comparator.
DIB Interface
O
Odpc
Clock and Power Positive. Provides clock and power to the LSD.
Connect to DIB transformer primary winding non-dotted terminal.
O
Odpc
Clock and Power Negative. Provides clock and power to the LSD.
Connect to DIB transformer primary winding dotted terminal.
I/O Idd/Odd Data Positive. Transfers data, control, and status information between
the CX86500 and the LSD. Connect to LSD through DIB data positive
channel components.
I/O Idd/Odd Data Negative. Transfers data, control, and status information between
the CX86500 and the LSD. Connect to LSD through DIB data negative
channel components.
NVRAM Interface
I/O Ipu/O2
NVRAM Clock. During normal operation, NVMCLK/PARIF output high
enables the EEPROM. Connect to EEPROM SCL pin.
Parallel/Serial Interface Select. During reset processing: parallel host
interface is selected by NVMCLK/PARIF high (by internal pullup when no
external pullup is connected to the pin); serial host interface is selected
by NVMCLK/PARIF low (pin connected to GND through a 10 KΩ
pulldown resistor).
I/O Ipu/O2
NVRAM Data. The NVMDATA pin supplies a serial data interface to the
EEPROM. Connect to EEPROM SDA pin and to +3.3V through 10 KΩ.
102287F
Conexant
3-9
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