DSPIC33FJ16GP304 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'DSPIC33FJ16GP304' PDF : 284 Pages View PDF
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
FIGURE 1-1:
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 BLOCK DIAGRAM
PSV and Table
Data Access
Control Block
Interrupt
Controller
23
23
23
8
16
PCU PCH PCL
Program Counter
Stack
Control
Logic
Loop
Control
Logic
Y Data Bus
X Data Bus
16
16
Data Latch
16
Data Latch
X RAM
Address
Latch
Y RAM
Address
Latch
16
16
PORTA
PORTB
16
PORTC
Address Latch
Program Memory
Data Latch
24
Address Generator Units
ROM Latch
EA MUX
16 16
Remappable
Pins
Instruction
Decode and
Control
Control Signals
to Various Blocks
OSC2/CLKO Timing
OSC1/CLKI Generation
FRC/LPRC
Oscillators
Precision
Band Gap
Reference
Voltage
Regulator
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Instruction Reg
16
DSP Engine
Divide Support
16 x 16
W Register Array
16
16-bit ALU
16
VCAP
VDD, VSS MCLR
Timers
1-3
UART1
ADC1
OC/
PWM1-2
IC1,2,7,8
CNx
I2C1
SPI1
Note:
Not all pins or features are implemented on all device pinout configurations. See “Pin Diagrams” for the specific pins
and features present on each device.
DS70290G-page 12
© 2011 Microchip Technology Inc.
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