EDS5116ABTA-6B View Datasheet(PDF) - Elpida Memory, Inc
Part Name
Description
MFG CO.
'EDS5116ABTA-6B' PDF : 52 Pages View PDF
EDS5104ABTA, EDS5108ABTA, EDS5116ABTA
Self Refresh Cycle
CLK
CKE
/CS
/RAS
CKE Low
/CAS
/WE
BS
Address
A10=1
DQM
DQ (input)
DQ (output)
t RP
Precharge command
If needed
Self refresh entry
command
lSREX
High-Z
t RC
Self refresh exit
ignore command
or No operation
Next
clock
enable
Self refresh entry
command
t RC
Next Auto
clock refresh
enable
Self refresh cycle
/RAS-/CAS delay = 3
CL = 3
BL = 4
= VIH or VIL
Clock Suspend Mode
tSI
tHI
tSI
CLK
CKE
/CS
/RAS
/CAS
/WE
BS
Address
DQM
DQ (output)
DQ (input)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Read cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
R:a
C:a
R:b
C:b
a a+1 a+2
a+3
b b+1 b+2 b+3
High-Z
CKE
/CS
/RAS
/CAS
/WE
BS
Address
DQM
DQ (output)
DQ (input)
Bank0 Active clock
Active suspend start
R:a
Active clock Bank0
suspend end Read
Bank3 Read suspend Read suspend Bank3 Bank0
Active
start
end Read Precharge
Earliest Bank3
Precharge
C:a R:b
High-Z
a a+1 a+2
C:b
a+3 b b+1 b+2 b+3
Write cycle
/RAS-/CAS delay = 2
/CAS latency = 2
Burst length = 4
= VIH or VIL
Bank0 Active clock
Active suspend start
Active clock Bank0 Bank3 Write suspend Write suspend Bank3 Bank0
supend end Write Active
start
end Write Precharge
Earliest Bank3
Precharge
Preliminary Data Sheet E0250E10 (Ver. 1.0)
47
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