EM73982 View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
MFG CO.
'EM73982' PDF : 41 Pages View PDF
EM73982
4-BIT MICROCONTROLLER
Mnemonic Object code ( binary ) Operation description
CMPAM
CMPH #k
CMPIA #k
CMPL #k
0111 0011
0110 1110 1011 kkkk
1011 kkkk
0110 1110 0011 kkkk
RAM[HL] - Acc
k - HR
k - Acc
k-LR
(8) Bit manipulation
Byte Cycle
Flag
C ZS
1
1 C Z Z'
2
2
- ZC
1
1 C Z Z'
2
2
- ZC
Mnemonic Object code ( binary ) Operation description
CLM b 1111 00bb
CLP p,b 0110 1101 11bb pppp
CLPL
0110 0000
CLR y,b 0110 1100 11bb yyyy
SEM b 1111 01bb
SEP p,b 0110 1101 01bb pppp
SEPL
0110 0010
SET y,b 0110 1100 01bb yyyy
TF y,b 0110 1100 00bb yyyy
TFA b 1111 10bb
TFM b 1111 11bb
TFP p,b 0110 1101 00bb pppp
TFPL
0110 0001
TT y,b 0110 1100 10bb yyyy
TTP p,b 0110 1101 10bb pppp
RAM[HL]b←0
PORT[p]b←0
PORT[LR3-2+4]LR1-0←0
RAM[y]b←0
RAM[HL]b←1
PORT[p]b←1
PORT[LR3-2+4]LRl-0←1
RAM[y]b←1
SF←RAM[y]b'
SF←Accb'
SF←RAM[HL]b'
SF←PORT[p]b'
SF←PORT[LR 3-2 +4]LR1-0'
SF←RAM[y]b
SF←PORT[p]b
(9) Subroutine
Byte Cycle
Flag
CZS
1
1
- -1
2
2
- -1
1
2
- -1
2
2
- -1
1
1
- -1
2
2
- -1
1
2
- -1
2
2
- -1
2
2
- -*
1
1
- -*
1
1
- -*
2
2
- -*
1
2
- -*
2
2
- -*
2
2
- -*
Mnemonic Object code ( binary ) Operation description
Byte Cycle
Flag
CZS
LCALL a 0100 0aaa aaaa aaaa STACK[SP]←PC,
2
2
- --
SP←SP -1, PC←a
SCALL a 1110 nnnn
STACK[SP]←PC,
1
2
- --
SP←SP - 1, PC←a, a = 8n + 6
(n =1∼15),0086h (n = 0)
RET
0100 1111
SP←SP + 1, PC←STACK[SP] 1
2
- --
(10) Input/output
Mnemonic Object code ( binary ) Operation description
INA p
INM p
OUT #k,p
OUTA p
OUTM p
0110 1111 0100 pppp
0110 1111 1100 pppp
0100 1010 kkkk pppp
0110 1111 000p pppp
0110 1111 100p pppp
Acc←PORT[p]
RAM[HL]←PORT[p]
PORT[p]←k
PORT[p]←Acc
PORT[p]←RAM[HL]
Byte Cycle
Flag
C ZS
2
2
- Z Z'
2
2
- - Z'
2
2
- -1
2
2
- -1
2
2
- -1
* This specification are subject to be changed without notice.
11.30.2001 39
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