(11) Flag manipulation
Mnemonic Object code ( binary ) Operation description
TFCFC
TTCFS
TZS
0101 0011
0101 0010
0101 1011
SF←CF', CF←0
SF←CF, CF←1
SF←ZF
(12) Interrupt control
Mnemonic Object code ( binary ) Operation description
CIL r
DICIL r
EICIL r
EXAE
RTI
0110 0011 11rr rrrr
0110 0011 10rr rrrr
0110 0011 01rr rrrr
0111 0101
0100 1101
IL←IL & r
EIF←0,IL←IL&r
EIF←1,IL←IL&r
MASK↔Acc
SP←SP+1,FLAG.PC
←STACK[SP],EIF ←1
(13) CPU control
Mnemonic Object code ( binary ) Operation description
NOP
0101 0110
no operation
(14) Timer/Counter & Data pointer & Stack pointer control
Mnemonic Object code ( binary ) Operation description
LDADPL
LDADPM
LDADPH
LDASP
0110 1010 1111 1100
0110 1010 1111 1101
0110 1010 1111 1110
0110 1010 1111 1111
Acc←[DP]L
Acc←[DP]M
Acc←[DP]H
Acc←SP
LDATAL
LDATAM
LDATAH
LDATBL
LDATBM
LDATBH
STADPL
STADPM
STADPH
STASP
0110 1010 1111 0100
0110 1010 1111 0101
0110 1010 1111 0110
0110 1010 1111 1000
0110 1010 1111 1001
0110 1010 1111 1010
0110 1001 1111 1100
0110 1001 1111 1101
0110 1001 1111 1110
0110 1001 1111 1111
Acc←[TA]L
Acc←[TA]M
Acc←[TA]H
Acc←[TB]L
Acc←[TB]M
Acc←[TB]H
[DP]L←Acc
[DP]M←Acc
[DP]H←Acc
SP←Acc
STATAL
STATAM
STATAH
STATBL
STATBM
STATBH
0110 1001 1111 0100
0110 1001 1111 0101
0110 1001 1111 0110
0110 1001 1111 1000
0110 1001 1111 1001
0110 1001 1111 1010
[TA]L←Acc
[TA]M←Acc
[TA]H←Acc
[ TB]L←Acc
[TB]M←Acc
[TB]H←Acc
* This specification are subject to be changed without notice.
EM73982
4-BIT MICROCONTROLLER
Byte Cycle Flag
CZS
1
1
0 -*
1
1
1 -*
1
1
- -*
Byte Cycle
Flag
C ZS
2
2
- -1
2
2
- -1
2
2
- -1
1
1
- -1
1
2
* **
Byte Cycle
1
1
Flag
C ZS
- --
Byte Cycle
Flag
C ZS
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- Z1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
2
2
- -1
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