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EMC6D102-CZC View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
MFG CO.
'EMC6D102-CZC' PDF : 86 Pages View PDF
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
Datasheet
7.2.23
Register 6F: XOR Test Register
Register
Address
6Fh
Read/
Write
R/W
Register Name
XOR Test Register
Bit 7
(MSb)
RES
Bit 6
RES
Bit 5
RES
Bit 4 Bit 3 Bit 2
RES RES RES
Bit 1
RES
Bit 0
(LSb)
XEN
Default
Value
00h
7.2.24
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
The part incorporates an XOR tree test mode. When the test mode is enabled by setting the ‘XEN’ bit
high via SMBus, the part enters XOR test mode.
The following signals are included in the XOR test tree:
VID0, VID1, VID2, VID3, VID4
TACH1, TACH2, TACH3, TACH4
PWM2, PWM3
Since the test mode is XOR tree, the order of the signals in the tree is not important. SDA and SCL
are not included in the test tree.
Register 79h: SMSC Test Register
Register
Address
79h
Read
/Write
R/W
Register Name
SMSC Test Register
Bit 7
(MSb)
TST7
Bit 6
TST6
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
TST5 TST4 TST3 TST2 TST1
Bit 0
(LSb)
TST0
Default
Value
00h
7.2.25
This is a read/write register. Writing this register may produce unwanted results.
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
Register 7Ah: SMSC Test Register
Register
Address
7Ah
Read/
Write
R
Register Name
SMSC Test Register
Bit 7
(MSb)
RES
Bit 6
TST6
Bit 5
TST5
Bit 4
TST4
Bit 3
TST3
Bit 2
Bit 1
Bit 0
(LSb)
TST2 TST1 TST0
Default
Value
00h
7.2.26
This is a read/write register. Writing this register may produce unwanted results.
Register 7Bh: SMSC Test Register
Register
Address
7Bh
Read/
Write
R/W
Register Name
SMSC Test Register
Bit 7
(MSb)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 Default
(LSb) Value
TST7 TST6 TST5 TST4 TST3 TST2 TST1 TST0
00h
This is a read/write register. Writing this register may produce unwanted results.
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
SMSC EMC6D102
67
DATASHEET
Revision 0.4 (04-05-05)
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