EP7212-CV-A View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

EP7212-CV-A

High-Performance, Low-Power System-on-Chip with LCD Controller and Digital Audio Interface (DAI)

Cirrus Logic 

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EP7212

EXPCLK

DRA[12:0]

RAS[3:0]

CAS[3:0]

Held

tCSA

tRAS tRC

Row

Col

D[31:0]

Held

NMOE

NMWE

Figure 22. DRAM CAS Before RAS Refresh Cycle at 13 MHz and 18 MHz

NOTES:

1). tCSA (CAS set-up time) = 15 ns max at 18.432 MHz and 20 ns at 13 MHz

2) tRAS (RAS pulse width) = 70 ns max at 18.432 MHz and 110 ns at 13 MHz

3) tRC (cycle time) = 180 ns max at 18.432 MHz and 230 ns at 13 MHz

4) The filled-in grey area is a don’t care.

When DRAMs are placed in self-refresh (entering the Standby State), the same timings, except that tRAS

is extended indefinitely.

108

DS474PP1

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