AD1940/AD1941
Table 32. Data Capture Register Write Format
Byte 0
Byte 1
chip_adr [6:0], W/R 0000, data_capture_adr [11:8]
Byte 2
data_capture_adr [7:0]
Byte 3
000, progcount [10:6]1
Byte 4
progcount [5:0]1, regsel [1:0]2
1 Progcount [10:0] = value of program counter where trap occurs (the table of values is generated by the program compiler).
2 Regsel [1:0] selects one of four registers (see Data Capture Registers section).
Table 33. Data Capture (Control Port Readback) Register Read Format
Byte 0
Byte 1
chip_adr [6:0], W/R
0000, data_capture_adr [11:8]
Byte 2
data_capture_adr [7:0]
Bytes 3–5
data [23:0]
Table 34. Safeload Register Data Write Format
Byte 0
Byte 1
chip_adr [6:0], W/R
0000, safeload_adr [11:8]
Byte 2
safeload_adr [7:0]
Byte 3
000000, data [33:32]
Bytes 4–7
data [31:0]
Table 35. Safeload Register Address Write Format
Byte 0
Byte 1
chip_adr [6:0], W/R
0000, safeload_adr [11:8]
Byte 2
safeload_adr [7:0]
Byte 3
000000, param_adr [9:8]
Byte 4
param_adr [7:0]
Rev. A | Page 27 of 36