EVAL-AD5254EBZ2 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD5254EBZ2' PDF : 32 Pages View PDF
From Master to Slave
From Slave to Master
S = start condition
P = stop condition
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
AD1, AD0 = I2C device address bits, must match with the logic states at Pins AD1, AD0
R/W = read enable bit at logic high; write enable bit at logic low
CMD/REG = command enable bit at logic high; register access bit at logic low
C3, C2, C1, C0 = command bits
A2, A1, A0 = RDAC/EEMEM register addresses
AD5253/AD5254
S 0 1 0 1 1AA1A
DD
10
RDAC_N OR EEMEM_N
REGISTER DATA
A RDAC_N + 1 OR EEMEM_N + 1 A P
REGISTER DATA
SLAVE ADDRESS
1 READ
(N BYTES + ACKNOWLEDGE)
Figure 29. RDAC Current Read (Restricted to Previously Selected Address Stored in the Register)
S
SLAVE ADDRESS
0 A INSTRUCTIONAL AND A S
ADDRESS
SLAVE ADDRESS
1A
RDAC OR
EEMEM DATA
A/A P
0 WRITE
REPEATED START
Figure 30. RDAC or EEMEM Random Read
1 READ
(N BYTES + ACKNOWLEDGE)
S 0 1 0 1 1 A A 0 A CMD/ C C C C A A A A P
DD
REG 3 2 1 0 2 1 0
10
RDAC SLAVE ADDRESS
0 WRITE 1 CMD
Figure 31. RDAC Quick Command Write (Dummy Write)
Rev. B | Page 17 of 32
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