EVAL-AD5382EBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD5382EBZ' PDF : 40 Pages View PDF
AD5382
GENERAL DESCRIPTION
The AD5382 is a complete, single-supply, 32-channel, 14-bit
denseDAC® available in a 100-lead LQFP package. All 32 channels
have an on-chip output amplifier with rail-to-rail operation. The
AD5382 includes an internal software-selectable 1.25 V/2.5 V,
10 ppm/°C reference, an on-chip channel monitor function that
multiplexes the analog outputs to a common MON_OUT pin
for external monitoring, and an output amplifier boost mode
that allows optimization of the amplifier slew rate.
The AD5382 contains a double-buffered parallel interface,
which features a 20 ns WR pulse width, an SPI-, QSPI-,
Data Sheet
MICROWIRE-, DSP-compatible serial interface with
interface speeds in excess of 30 MHz and an I2C®-compatible
interface that supports a 400 kHz data transfer rate.
An input register followed by a DAC register provides double
buffering, allowing the DAC outputs to be updated
independently or simultaneously using the LDAC input.
Each channel has a programmable gain and offset adjust
register that allows the user to fully calibrate any DAC
channel. Power consumption is typically 0.25 mA per channel
when operating with boost mode disabled.
Rev. D | Page 4 of 40
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