Consequently, the slew rate and settling time of a voltage-
switching DAC circuit is determined largely by the output op
amp. To obtain minimum settling time in this configuration,
minimize capacitance at the VREF node (the voltage output node
in this application) of the DAC. This is done by using low input
capacitance buffer amplifiers and careful board design.
AD5405
Most single-supply circuits include ground as part of the analog
signal range, which in turn requires an amplifier that can
handle rail-to-rail signals. Analog Devices offers a wide range of
single-supply amplifiers, as listed in Table 8 and Table 9.
Table 7. Suitable ADI Precision References
Part No. Output Voltage (V) Initial Tolerance (%)
ADR01 10
0.05
ADR01 10
0.05
ADR02 5
0.06
ADR02 5
0.06
ADR03 2.5
0.10
ADR03 2.5
0.10
ADR06 3
0.10
ADR06 3
0.10
ADR431 2.5
0.04
ADR435 5
0.04
ADR391 2.5
0.16
ADR395 5
0.10
Temp Drift (ppm/°C)
3
9
3
9
3
9
3
9
3
3
9
9
ISS (mA)
1
1
1
1
1
1
1
1
0.8
0.8
0.12
0.12
Output Noise (μV p-p)
20
20
10
10
6
6
10
10
3.5
8
5
8
Package
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
TSOT-23, SC70
SOIC-8
SOIC-8
TSOT-23
TSOT-23
Table 8. Suitable ADI Precision Op Amps
Part No.
OP97
OP1177
AD8551
AD8603
AD8628
Supply Voltage (V)
±2 to ±20
±2.5 to ±15
2.7 to 5
1.8 to 6
2.7 to 6
VOS (Max) (μV)
25
60
5
50
5
IB (Max) (nA)
0.1
2
0.05
0.001
0.1
0.1 Hz to 10 Hz
Noise (μV p-p)
0.5
0.4
1
2.3
0.5
Supply Current (μA)
600
500
975
50
850
Package
SOIC-8
MSOP, SOIC-8
MSOP, SOIC-8
TSOT
TSOT, SOIC-8
Table 9. Suitable ADI High Speed Op Amps
Part No. Supply Voltage (V) BW @ ACL (MHz)
AD8065 5 to 24
145
AD8021 ±2.5 to ±12
490
AD8038 3 to 12
350
AD9631 ±3 to ±6
320
Slew Rate (V/μs)
180
120
425
1,300
VOS (Max) (μV)
1,500
1,000
3,000
10,000
IB (Max) (nA)
6,000
10,500
750
7,000
Package
SOIC-8, SOT-23, MSOP
SOIC-8, MSOP
SOIC-8, SC70-5
SOIC-8
Rev. B | Page 17 of 24