EVAL-AD5764REBZ View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

EVAL-AD5764REBZ

Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC

Analog Devices 

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AD5764R

Preliminary Technical Data

Pin No.

19

20

21

22

23

24

25

26

27

28

29

32

Mnemonic

VOUTC

AGNDC

AGNDB

VOUTB

VOUTA

AGNDA

REFAB

REFCD

REFOUT

REFGND

TEMP

BIN/2sCOMP

Description

Analog Output Voltage of DAC C. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier

is capable of directly driving a 10 kΩ, 200 pF load.

Ground Reference Pin for DAC C Output Amplifier.

Ground Reference Pin for DAC B Output Amplifier.

Analog Output Voltage of DAC B. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier

is capable of directly driving a 10 kΩ, 200 pF load.

Analog Output Voltage of DAC A. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier

is capable of directly driving a 10 kΩ, 200 pF load.

Ground Reference Pin for DAC A Output Amplifier.

External Reference Voltage Input for Channel A and Channel B. Reference input range is 1 V to 7 V; programs the

full-scale output voltage. REFIN = 5 V for specified performance.

External Reference Voltage Input for Channel C and Channel D. Reference input range is 1 V to 7 V; programs the

full-scale output voltage. REFIN = 5 V for specified performance.

Reference Output. This is the reference output from the internal voltage reference. The internal reference is 5 V ± 3

mV at 25°C, with a reference tempco of 10 ppm/°C.

Reference Ground Return for the Reference Generator and Buffers.

This pin provides an output voltage proportional to temperature. The output voltage is 1.4 V typical at 25°C die

temperature; variation with temperature is 5 mV/°C.

Determines the DAC Coding. This pin should be hardwired to either DVCC or DGND. When hardwired to DVCC, input

coding is offset binary. When hardwired to DGND, input coding is twos complement (see Table 6).

1 Internal pull-up device on this logic input. Therefore, it can be left floating and defaults to a logic high condition.

Rev. PrA | Page 12 of 32

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