AD7621
TRANSFER FUNCTIONS
Using the OB/2C digital input, the AD7621 offers two output
codings: straight binary and twos complement. The LSB size
with VREF = 2.048 V is 2 × VREF/65536, which is 62.5 μV. Refer
to Figure 23 and Table 7 for the ideal transfer characteristic.
111...111
111...110
111...101
Table 7. Output Codes and Ideal Input Voltages
Digital Output Code
Description
FSR −1 LSB
Analog Input
VREF = 2.048 V
+2.047938 V
Straight
Binary
0xFFFF1
Twos
Complement
0x7FFF6
FSR − 2 LSB
+2.047875 V 0xFFFE 0x7FFE
Midscale + 1 LSB +62.5 μV
0x8001 0x0001
Midscale
0V
0x8000 0x0000
Midscale − 1 LSB −62.5 μV
0x7FFF 0xFFFF
−FSR + 1 LSB
−FSR
−2.047938 V
−2.048 V
0x0001
0x00002
0x8001
0x80007
000...010
000...001
000...000
–FSR –FSR+1 LSB
–FSR+0.5 LSB
+FSR–1 LSB
+FSR–1.5 LSB
ANALOG INPUT
1 This is also the code for overrange analog input (VIN+ − VIN− above
VREF − VREFGND).
2 This is also the code for underrange analog input (VIN+ − VIN− below
−VREF + VREFGND).
Figure 23. ADC Ideal Transfer Function
ANALOG
SUPPLY (2.5V)
10ïF
100nF
NOTE 5
10ï—
10ïF
DIGITAL
SUPPLY (2.5V)
100nF
100nF
10ïF
DIGITAL
INTERFACE
SUPPLY
(2.5V OR 3.3V)
ANALOG
INPUT +
ANALOG
INPUT –
CREF
10ïF
100nF
NOTE 4
NOTE 2
U1
CC
10ï—
1nF
NOTE 1
NOTE 2
U2
10ï—
CC
1nF
NOTE 1
AVDD AGND DGND
REF NOTE 3
REFBUFIN
REFGND
DVDD OVDD
OGND
SCLK
SDOUT
BUSY
IN+
CNVST
AD7621
OB/2C
SER/PAR
WARP
IMPULSE
CS
IN–
RD
NOTE 3
PD PDREF PDBUF
RESET
SERIAL
PORT
NOTE 7
50ï—
D
50pF
OVDD
MICROCONVERTER/
MICROPROCESSOR/
DSP
50pF
10kï—
NOTE 6
CLOCK
1. SEE ANALOG INPUT SECTION.
2. THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
3. THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE. SEE VOLTAGE REFERENCE INPUT SECTION.
4. A 10ïF CERAMIC CAPACITOR (X5R, 1206 SIZE) IS RECOMMENDED (e.g., PANASONIC ECJ3YB0J106M).
SEE VOLTAGE REFERENCE INPUT SECTION.
5. OPTION, SEE POWER SUPPLY SECTION.
6. OPTION, SEE POWER UP SECTION.
7. OPTIONAL LOW JITTER CNVST, SEE CONVERSION CONTROL SECTION.
Figure 24. Typical Connection Diagram
Rev. A | Page 16 of 32