AD7730/AD7730L
Table III. Output Noise vs. Input Range and Update Rate (CHP = 0)
Typical Output RMS Noise in nV
Output –3 dB
Data Rate Frequency
150 Hz
200 Hz
300 Hz
600 Hz
1200 Hz
5.85 Hz
7.8 Hz
11.7 Hz
23.4 Hz
46.8 Hz
SF
Word
2048
1536
1024
512
256
Settling Time
Normal Mode
166 ms
125 ms
83.3 ms
41.6 ms
20.8 ms
Settling Time
Fast Mode
26.6 ms
20 ms
13.3 ms
6.6 ms
3.3 ms
Input Range
= ؎80 mV
160
190
235
300
435
Input Range Input Range Input Range
= ؎40 mV = ؎20 mV = ؎10 mV
110
80
60
130
95
75
145
100
80
225
135
110
315
210
150
Table IV. Peak-to-Peak Resolution vs. Input Range and Update Rate (CHP = 0)
Peak-to-Peak Resolution in Counts (Bits)
Output –3 dB
Data Rate Frequency
150 Hz
200 Hz
300 Hz
600 Hz
1200 Hz
5.85 Hz
7.8 Hz
11.7 Hz
23.4 Hz
46.8 Hz
SF
Word
2048
1536
1024
512
256
Settling Time
Normal Mode
166 ms
125 ms
83.3 ms
41.6 ms
20.8 ms
Settling Time
Fast Mode
26.6 ms
20 ms
13.3 ms
6.6 ms
3.3 ms
Input Range
= ؎80 mV
165k (17.5)
140k (17)
115k (17)
90k (16.5)
60k (16)
Input Range Input Range Input Range
= ؎40 mV = ؎20 mV = ؎10 mV
120k (17)
100k (16.5)
90k (16.5)
60k (16)
43k (15.5)
80k (16.5)
70k (16)
65k (16)
50k (15.5)
32k (15)
55k (16)
45k (15.5)
40k (15.5)
30k (15)
20k (14.5)
ON-CHIP REGISTERS
The AD7730 contains thirteen on-chip registers which can be accessed via the serial port of the part. These registers are summarized
in Figure 4 and in Table V and described in detail in the following sections.
COMMUNICATIONS REGISTER
DIN
DIN
RS2 RS1 RS0
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
STATUS REGISTER
DATA REGISTER
DIN
MODE REGISTER
DIN
FILTER REGISTER
DIN
DAC REGISTER
DIN
OFFSET REGISTER (x3)
DIN
GAIN REGISTER (x3)
DIN
TEST REGISTER
Figure 4. Register Overview
REGISTER
SELECT
DECODER
REV. A
–11–