EVAL-AD7863CB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD7863CB' PDF : 24 Pages View PDF
AD7863
A15
A0
TMS320C25
IS
INTn
STRB
R/W
READY
ADDRESS BUS
ADDRESS
DECODE
EN
OPTIONAL
CS CONVST
A0
AD7863*
BUSY
RD
MSC
DB13
DMD15
DMD0
DB0
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 21. AD7863 to TMS320C25 Interface
Some applications may require that the conversion be initiated
by the microprocessor rather than an external timer. One
option is to decode the AD7863 CONVST from the address bus
so that a write operation starts a conversion. Data is read at the
end of the conversion sequence as before. Figure 23 shows an
example of initiating conversion using this method. Note that
for all interfaces, it is preferred that a read operation not be
attempted during conversion.
AD7863 TO MC68000 INTERFACE
An interface between the AD7863 and the MC68000 is shown
in Figure 22. As before, conversion can be supplied from the
MC68000 or from an external source. The AD7863 BUSY line
can be used to interrupt the processor or, alternatively, software
delays can ensure that conversion has been completed before a
read to the AD7863 is attempted. Because of the nature of its
interrupts, the MC68000 requires additional logic (not shown
in Figure 23) to allow it to be interrupted correctly. For further
information on MC68000 interrupts, consult the MC68000
users manual.
The MC68000 AS and R/W outputs are used to generate a
separate RD input signal for the AD7863. CS is used to drive
the MC68000 DTACK input to allow the processor to execute
a normal read operation to the AD7863. The conversion results
are read using the following MC68000 instruction:
MOVE.W ADC, D0
where:
D0 is the 68000 D0 register.
ADC is the AD7863 address.
A15
A0
MC68000
ADDRESS BUS
ADDRESS
DECODE
EN
OPTIONAL
A0 CONVST
CS
DTACK
AS
R/W
AD7863*
RD
DB13
DB0
D15
DATA BUS
D0
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 22. AD7863 to MC68000 Interface
AD7863 TO 80C196 INTERFACE
Figure 23 shows an interface between the AD7863 and the
80C196 microprocessor. Here, the microprocessor initiates
conversion. This is achieved by gating the 80C196 WR signal
with a decoded address output (different from the AD7863 CS
address). The AD7863 BUSY line is used to interrupt the
microprocessor when the conversion sequence is completed.
A15
ADDRESS BUS
A1
80C196
ADDRESS
CS
DECODE
A0
EN
AD7863*
BUSY
WR
RD
RD
DB13
DB0
D15
DATA BUS
D0
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 23. AD7863–80C196 Interface
VECTOR MOTOR CONTROL
The current drawn by a motor can be split into two components:
one produces torque and the other produces magnetic flux.
For optimal performance of the motor, these two components
should be controlled independently. In conventional methods of
controlling a three-phase motor, the current (or voltage)
supplied to the motor and the frequency of the drive are the
basic control variables. However, both the torque and flux are
functions of current (or voltage) and frequency. This coupling
effect can reduce the performance of the motor because, for
example, if the torque is increased by increasing the frequency,
the flux tends to decrease.
Rev. B | Page 18 of 24
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