ADE7880
Data Sheet
Given a phase error of x degrees, measured using the phase
voltage as the reference, the corresponding LSBs are computed
dividing x by the phase resolution (0.0211°/LSB for 60 Hz and
0.0176°/LSB for 50 Hz). Results between −383 and +63 only are
acceptable; numbers outside this range are not accepted. If the
current leads the voltage, the result is negative and the absolute
value is written into the PHCAL registers. If the current lags the
voltage, the result is positive and 512 is added to the result
before writing it into xPHCAL.
APHCAL, BPHCAL, or CPHCAL
=
phase
x
_ resolution
,x
0
(9)
phase
x
_ resolution
512,
x
0
Figure 65 illustrates how the phase compensation is used to remove
x = −1° phase lead in IA of the current channel from the external
current transducer (equivalent of 55.5 μs for 50 Hz systems). To
cancel the lead (1°) in the current channel of Phase A, a phase
lead must be introduced into the corresponding voltage channel.
Using Equation 8, APHCAL is 57 least significant bits, rounded
up from 56.8. The phase lead is achieved by introducing a time
delay of 55.73 μs into the Phase A current.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7880 work on 32-, 16-, or 8-bit words. As
shown in Figure 64, APHCAL, BPHCAL, and CPHCAL 10-bit
registers are accessed as 16-bit registers with the six MSBs
padded with 0s.
15
10 9
0
0000 00
xPHCAL
Figure 64. xPHCAL Registers Communicated As 16-Bit Registers
IAP
IA
IAN
PGA1
VAP
VA
VN
PGA3
ADC
PHASE
CALIBRATION
APHCAL = 57
ADC
1°
IA
VA
IA
PHASE COMPENSATION
ACHIEVED DELAYING
IA BY 56µs
VA
50Hz
Figure 65. Phase Calibration on Voltage Channels
Rev. C | Page 38 of 107