EVAL-ADV7183BEB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-ADV7183BEB' PDF : 104 Pages View PDF
ADV7183A
1
NVBEGSIGN
0
ADVANCE BEGIN OF
VSYNC BY NVBEG[4:0]
DELAY BEGIN OF
VSYNC BY NVBEG[4:0]
NOT VALID FOR USER
PROGRAMMING
ODD FIELD?
YES
NO
NVBEGDELO
1
0
ADDITIONAL
DELAY BY
1 LINE
NVBEGDELE
0
1
ADDITIONAL
DELAY BY
1 LINE
VSBHO
1
0
ADVANCE BY
0.5 LINE
VSBHE
0
1
ADVANCE BY
0.5 LINE
VSYNC BEGIN
Figure 23. NTSC VSync Begin
NVBEGDELO NTSC VSync Begin Delay on Odd Field,
Address 0xE5 [7]
Table 110. NVBEGDELO Function
NVBEGDELO Description
0 (default) No delay.
1
Delay VSync going high on an odd field by a line
relative to NVBEG.
NVBEGDELE NTSC VSync Begin Delay on Even Field,
Address 0xE5 [6]
Table 111. NVBEGDELE Function
NVBEGDELE Description
0 (default) No delay.
1
Delay VSync going high on an even field by a
line relative to NVBEG.
NVBEGSIGN NTSC VSync Begin Sign, Address 0xE5 [5]
Table 112. NVBEGSIGN Function
NVBEGSIGN
Description
0
Delay start of VSync. Set for user manual
programming.
1 (default)
Advance start of VSync. Not recommended
for user programming.
NVBEG[4:0] NTSC VSync Begin, Address 0xE5 [4:0]
Table 113. NVBEG Function
NVBEG
Description
00101 (default) NTSC VSync begin position.
For all NTSC/PAL VSync timing controls, both the V bit in the
AV code and the VSync on the VS pin are modified.
1
NVENDSIGN
0
ADVANCE END OF
VSYNC BY NVEND[4:0]
DELAY END OF VSYNC
BY NVEND[4:0]
NOT VALID FOR USER
PROGRAMMING
ODD FIELD?
YES
NO
NVENDDELO
1
0
ADDITIONAL
DELAY BY
1 LINE
NVENDDELE
0
1
ADDITIONAL
DELAY BY
1 LINE
VSEHO
1
0
ADVANCE BY
0.5 LINE
VSEHE
0
1
ADVANCE BY
0.5 LINE
VSYNC END
Figure 24. NTSC VSync End
Rev. B | Page 46 of 104
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