EVAL-CED1Z View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
EVAL-CED1Z
Analog Devices
'EVAL-CED1Z' PDF : 32 Pages View PDF
AD7262
Data Sheet
ADJUSTING THE OFFSET CALIBRATION REGISTERS
The internal offset calibration register can be adjusted manually
to compensate for any signal path offset from the sensors to the
ADC. Here, no internal calibration is required, and the CAL pin
can remain at a low logic state. By changing the contents of the
offset register, different amounts of offset on the analog input
signal can be compensated for. To determine the digital code to
be written to the offset register
1. Configure the sensor to its offset state.
2. Perform a number of conversions using the AD7262/
AD7262-5.
3. Take the mean digital output code from both DOUTA
and DOUTB. This is a 12-bit result and the offset register
is 12 bits; thus, the result can be stored directly in the
offset register.
4. Write the digital code to the offset registers to calibrate the
AD7262/AD7262-5.
If a +10 mV offset is present in the analog input signal and the
gain of the PGA is 2, the code that needs to be written to the
offset register to compensate for the offset is
10 mV
(1.22 mV/ 2)
16.39
0000 00010000
If a − 10 mV offset is present in the analog input signal and the
gain of the PGA is 2, the code that needs to be written to the
offset register to compensate for the offset is
10mV
(305μV/2) = −16.39 = 1000 0001 0000
SYSTEM GAIN CALIBRATION
The AD7262/AD7262-5 also allow the user to write to an
external gain register, thus enabling the removal of any overall
system gain error. Both ADC A and ADC B have independent
external gain registers, allowing the user to calibrate independently
the gain on both ADC A and ADC B signal paths. The gain
calibration feature can be used to implement accurate gain
matching between ADC A and ADC B.
The system calibration function is used by setting the sensors to
which the AD7262/AD7262-5 are connected to a 0 gain state.
The AD7262/AD7262-5 convert this analog input to a digital
output code, which corresponds to the system gain and is avail-
able on the DOUTx pins. This digital output code can then be stored
in the appropriate external register. For details on how to write to
a register, see the Writing to a Register section and Table 11.
The gain calibration register contains seven bits of data. By
changing the contents of the gain register, different amounts of
gain on the analog input signal can be compensated for. The
MSB is a sign bit, while the remaining six bits store the multiplica-
tion factor, which is used to adjust the analog input range. The
gain register value is effectively multiplied by the analog input
to scale the conversion result over the full range. Increasing the
gain register multiplication factor compensates for a larger
analog input range, and decreasing the gain register multiplier
compensates for a smaller analog input range. Each bit in the
gain calibration register has a resolution of 2.4 × 10−4 V (1/4096).
A maximum of 1.538% of the analog range can be calibrated for.
The multiplier factor stored in the gain register can be decoded
as outlined in Table 13.
The gain registers can be cleared by writing all 0s to each register,
as described in the Writing to a Register section. For accurate
gain calibration, both the positive and negative full-scale digital
output codes should be measured prior to determining the
multiplication factor that is written to the gain register.
Table 13. Decoding of Multiplication Factors for Gain Calibration
Analog Input
Digital Gain Gain Register
Error
Code
Multiplier
Equation
V
LSB
(Sign bit + 6 bits) (1 ± x/4096)
VIN max
0 LSB
0 000000
1 − 0/4096
VIN max – 244 μV
−2 LSB
0 000001
1 − 1/4096
VIN max − (63 × 244 μV) −126 LSB
0 111111
1 − 63/4096
VIN max
0 LSB
1 000000
1 + 0/4096
VIN max + 244 μV
+2 LSB
1 000001
1 + 1/4096
VIN max + (63 × 244 μV) +126 LSB
1 111111
1 + 63/4096
Multiplier
Value
Comments
1
0.999755859
0.98461914
1
1.000244141
1.015380859
Sign bit = 0, which implies negative sign
in multiplier equation
Sign bit = 0, which implies negative sign
in multiplier equation
Sign bit = 0, which implies negative sign
in multiplier equation
Sign bit = 1, which implies plus sign in
multiplier equation
Sign bit = 1, which implies plus sign in
multiplier equation
Sign bit = 1, which implies plus sign in
multiplier equation
Rev. B | Page 28 of 32
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