GL603USB View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL603USB' PDF : 41 Pages View PDF
GL603USB/GL603USB-A/GL603USB-B
The rise and fall time of the signals on this cable are greater than 75ns to keep RFI (radio frequency
interference) emissions under FCC (Federal Communications Commission) class B limits and less than
300ns to limit timing delays, signaling skews, and distortions. The driver reaches the specified static signal
levels with smooth rise and fall times, and minimal reflections and ringing when driving the cable. This
driver is used only on segments between low-speed devices and the ports to which they are connected.
USB data transmission is done with differential signals. A differential input receiver is used to accept the
USB data signal. A differential 1 on the bus is represented by D+ being at least 200mV more positive than
D- as seen at the receiver, and a differential 0 is represented by D- being at least 200mV more positive than
D+ as seen at the receiver. The signal cross over point must be between 1.3V and 2.0V.
The receiver features an input sensitivity of 200mV when both differential data inputs are in the range of
0.8V and 2.5V with respect to the local ground reference. This is called the common mode input voltage
range. Proper data reception also is achieved when the differential data lines are outside the common mode
range. The receiver can tolerate static input voltage between –0.5V to 3.8V with respect to its local ground
reference without damage. In addition to the differential receiver, there is a single-ended receiver for each
of the two data lines.
1.0
0.8
0.6
0.4
0.2
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2
Common Mode Input Voltage (volts)
Figure 4-3 Differential Input Sensitivity over Entire Common Mode Range
The data receivers for all types of devices must be able to properly decode the differential data in the
presence of jitter. The more of the bit time that any data edge can occupy and still be decoded, the more
reliable the data transfer will be. Data receivers are required to decode differential data transitions that
occur in a window plus and minus a nominal quarter bit time from the nominal (centered) data edge
position. Jitter will be caused by the delay mismatches and by mismatches in the source and destination
data rates (frequencies).
23
09/22/00
Revision 1.4
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