GL824C View Datasheet(PDF) - GENESYS LOGIC
Part Name
Description
MFG CO.
'GL824C' PDF : 56 Pages View PDF
EXTRST_
RXD
TXD
I2CK
I2CD
VSEL
VBAT
GL824/GL824C USB 2.0 On-The-Go Controller
63
I
(pd)
External reset
196
B
(pu)
UART receives data input
197
O
(pu)
UART transmits data output
202
O
(pu)
I2C bus clock
203
B
(pu)
I2C data
206
I Key voltage detection input
207
I Battery voltage detection input
Pin Name
CS0_
CS1_
DA0~2
AINTRQ
DMACK_
AIORDY
DIOR_
DIOW_
DMARQ
DD0~15
ARESET_
Pin#
65
86
67,71,69
80
81
82
83
84
85
90,94,98,102,
108,112,116,
120,118,114,
110,106,100,
96,92,88
122
Type
O
O
O
I
(pd)
O
I
(pu)
O
O
I
(pd)
B
(pd)
O
ATA/ATAPI Interface
Description
PESETZ (PCVS2Z)
PESETZ (PCVS1Z)
Address 0~2
IREQZ
DMACK
IORDY (WAITZ)
I/O read strobe
I/O write strobe
DMARQ
Data 0~15
ARESET
Pin Name
SA1~12
SA0/A0
BA0/WSTS
BA1/RSTS
CKE
RAS_/RE_
Pin#
133,131,129,
130,132,134,
135,138,140,
137,144,146
136
142
139
148
150
Type
O
O/I
(pd)
O
O
O/I
(pu)
SDRAM/Host Interface
Description
SDRAM_A1~A12
SDRAM_A0 / share pin with A0 pin of HOST interface
SDRAM_BA0 / share pin with write status pin of HOST
interface
SDRAM_BA1 / share pin with read status pin of HOST
interface
SDRAM_CKE
SDRAM_RAS / share pin with read enable pin of HOST
interface
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