GL850A-MNNXX View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL850A-MNNXX' PDF : 29 Pages View PDF
GL850A USB 2.0 Low-Power HUB Controller
1.5K ohm
RESET#
R
C
R
AVDD
(3.3V)
Vbus
(5V)
33 ohm
DP0
Inside GL850A
On PCB
Figure 5.3 – RESET# (External Reset) setting and application
GL850A internally contains a power on reset circuit. The power on sequence is depicted in the next picture.
To fully control the reset process of GL850A, we suggest the reset time applied in the external reset circuit
should longer than that of the internal reset circuit.
Power good voltage, 2.5~2.8V
VCC(3.3V)
Internal reset
≒ μ 2.7 s
External reset
Figure 5.4 – Power on sequence of GL850A
5.2.2 PGANG/SUSPND Setting
To save pin count, GL850A uses the same pin to decide individual/gang mode as well as to output the
suspend flag. The individual/gang mode is decided within 20us after power on reset. Then, about 50ms later,
this pin is changed to output mode. GL850A outputs the suspend flag once it is globally suspended. For
individual mode, a pull low resister greater than 100KΩ should be placed. For gang mode, a pull high
resister greater than 100KΩ should be placed. In figure 5.6, we also depict the suspend LED indicator
schematics. It should be noticed that the polarity of LED must be followed, otherwise the suspend current
will be over spec limitation (2.5mA).
©2000-2007 Genesys Logic Inc. - All rights reserved.
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