G-LINK
GLT7256L08
Ultra High Performance 3.3V 32K x 8 Bit CMOS STATIC RAM
Mar 2000(REV. 2.0)
DC Characteristics
Sym.
VIL
VIH
ILI
ILO
VOL
VOH
ICC
ICCSB
ICCSB1
Parameter
Guaranteed Input Low
Voltage (2)
Guaranteed Input High
Voltage (2)
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating Power Supply
Current
Standby Power Supply
Current
Power Down Power
Supply Current
Test Conditions
VCC=Max., VIN=0V to VCC
VCC=Max., CE ≥VIH
VCC=Min.,IOL =8mA
VCC=Min., IOH =-4mA
VCC=Max., CE ≤VIL,
II/O=0mA., F=Fmax(3)
VCC=Max., CE ≥VIH,
II/O=0mA., F=Fmax(3)
VCC=Max., CE ≥VCC.-0.2V,
VIN≥VCC. -0.2V or
Min. Typ(1)
-0.3 -
Max.
+0.8
Unit
V
2.0
-
VCC+0.3
V
-5
-
-5
-
5
µA
5
µA
-
-
0.4
V
2.4
-
-
V
-
- -8 -10 -12 -15
110 100 90 90 mA
-
-
15
mA
-
-
2
mA
1. Typical characteristics are at VCC=3.3V, TA=25°C.
2. These are absolute values with repeat to device ground and all overshoots due to system or
tester noise are included.
3. FMAX=1/tRC.
Data Retention (L version only)
Sym.
Parameter
Test Conditions
VDR VCC for Data retention
ICCDR(1) Data Retention Current
CE ≥VCC -0.2V,
VIN≥VCC -0.2V or VIN≤0.2V
VDR=2.0V
tCDR Chip Deselect to Data
Retention Time
Retention Waveform
tR
Operating Recovery Time
1. CE ≥VDR -0.2V, VIN≥VDR -0.2V or VIN≤0.2V.
2. tRC =Read Cycle Time.
Min. Typ(1)
2.0
-
Max.
3.6
30
0
-
-
tRC(2)
-
-
Unit
V
µA
ns
ns
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
-3-
G-Link Technology Corporation,Taiwan
2F, No.12, R&D Rd. II, Science-Based Industrial Park,
Hsin Chu, Taiwan, R.O.C.