HT48R01B-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R01B-1' PDF : 71 Pages View PDF
HT46R01B-1/HT46R01N-1
HT48R01B-1/HT48R01N-1
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. Most pins can have either an input or out-
put designation under user program control. Addi-
tionally, as there are pull-high resistors and wake-up
software configurations, the user is provided with an I/O
structure to meet the needs of a wide range of applica-
tion possibilities.
For input operation, these ports are non-latching, which
means the inputs must be ready at the T2 rising edge of
instruction ²MOV A,[m]², where m denotes the port ad-
dress. For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an external
resistor. To eliminate the need for these external resis-
tors, when configured as an input have the capability of
being connected to an internal pull-high resistor. These
pull-high resistors are selectable via a register known as
PAPU located in the Data Memory. The pull-high resis-
tors are implemented using weak PMOS transistors.
Note that pin PA7 does not have a pull-high resistor se-
lection.
Port A Wake-up
If the HALT instruction is executed, the device will enter
the Sleep Mode, where the system clock will stop result-
ing in power being conserved, a feature that is important
for battery and other low-power applications. Various
methods exist to wake-up the microcontroller, one of
which is to change the logic condition on one of the
PA0~PA7 pins from high to low. After a HALT instruction
forces the microcontroller into entering the Sleep Mode,
the processor will remain in a low-power state until the
logic condition of the selected wake-up pin on Port A
changes from high to low. This function is especially suit-
able for applications that can be woken up via external
switches. Note that pins PA0 to PA7 can be selected indi-
vidually to have this wake-up feature using an internal
register known as PAWK, located in the Data Memory.
· I/O Port Register Lists
Register
Name
PAWK
PAC
PAPU
PBC
PBPU
POR
00H
FFH
00H
0FH
00H
7
PAWK7
PAC7
¾
¾
¾
6
PAWK6
PAC6
PAPU6
¾
¾
5
PAWK5
PAC5
PAPU5
¾
¾
Bit
4
3
PAWK4 PAWK3
PAC4 PAC3
PAPU4 PAPU3
¾
¾
¾
¾
2
PAWK2
PAC2
PAPU2
¾
¾
1
PAWK1
PAC1
PAPU1
PBC1
PBPU1
0
PAWK0
PAC0
PAPU0
PBC0
PBPU0
²¾² Unimplemented, read as ²0²
PAWKn: PA wake-up function enable
0: disable
1: enable
PACn/PBCn: I/O type selection
0: output
1: input
PAPUn/PBPUn: Pull-high function enable
0: disable
1: enable
Rev.1.00
29
June 9, 2011
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