Rev.1.00
HT46R01B-1/HT46R01N-1
HT48R01B-1/HT48R01N-1
D a ta B u s
C o n tr o l B it
DQ
P u ll- H ig h
S e le c t
V DD
W eak
P u ll- u p
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
R e a d D a ta R e g is te r
S y s te m W a k e -u p
CK Q
S
D a ta B it
DQ
CK Q
S
M
U
X
I/O p in
W a k e - u p fu n c tio n p in o n ly
W a k e - u p S e le c t
Generic Input/Output Ports
D a ta B u s
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
C o n tr o l B it
DQ
CK Q
S
D a ta B it
DQ
CK Q
S
R e a d D a ta R e g is te r
S y s te m W a k e -u p
RES
M
U
X
W a k e - u p fu n c tio n
PA7 NMOS Input/Output Port
IO /R E S
D a ta B u s
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
R e a d D a ta R e g is te r
T o A /D C o n v e rte r
C o n tr o l B it
DQ
P u ll- H ig h
R e g is te r
S e le c t
CK Q
S
V DD
W eak
P u ll- u p
D a ta B it
DQ
CK Q
S
M
U
X
A n a lo g
In p u t
S e le c to r
A C S 1~A C S 0
PA7 NMOS Input/Output Port
A /D In p u t P o rt
31
June 9, 2011