HT46R01B-1/HT46R01N-1
HT48R01B-1/HT48R01N-1
P W M C o n tro l
PW M
PW M C
T0S
fS Y S
fL X T
0
M UX
fT P
1
T 0 P S C [2 :0 ]
T im e - B a s e C o n tr o l
7 S ta g e C o u n te r
7
8 -1 M U X
T im e - B a s e e v e n t in te r r u p t P e r io d
(2 10 ~
213 )*
1
fT P
T o T im e r 0 in te r n a l c lo c k
(fT 0 C K = fT P ~ fT P /1 2 8 )
T im e r P r e s c a le r
Note: If PWM is enabled, then fTP comes from fSYS and the T0S bit will have no effect.
Clock Structure for Timer/PWM/Time Base
T im e r 0 In te r n a l C lo c k
(fT 0 C K )
TC 0
T0E G
T0M 1,T0M 0
D a ta B u s
P r e lo a d R e g is te r
M o d e C o n tro l
T0O N
U p C o u n te r
8-bit Timer/Event Counter 0 Structure
T0O V
O v e r flo w
to In te rru p t
¸2
PFD 0
fS Y S /4
L X T O s c illa to r
M
U
X
T1S
TC 1
T1E G
T1M 1,T1M 0
D a ta B u s
P r e lo a d R e g is te r
M o d e C o n tro l
T1O N
U p C o u n te r
8-bit Timer/Event Counter 1 Structure
T1O V
O v e r flo w
to In te rru p t
¸2
PFD 1
PFD 0
PFD 1
PFD C S
0
M UX
1
P F D o u tp u t
Note: If PWM0 is enabled, then fTP comes from fSYS (ignore T0S)
Rev.1.00
33
June 9, 2011