HT48R0662G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R0662G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
6+2 PWM Mode
Each full PWM cycle, as it is controlled by an 8-bit PWM register, has 256 clock periods. However, in
the 6+2 PWM mode, each PWM cycle is subdivided into four individual sub-cycles known as
modulation cycle 0 ~ modulation cycle 3, denoted as i in the table. Each one of these four sub-cycles
contains 64 clock cycles. In this mode, a modulation frequency increase of four is achieved. The 8-bit
PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into
two groups. The first group which consists of bit2~bit7 is denoted here as the DC value. The second
group which consists of bit0~bit1 is known as the AC value. In the 6+2 PWM mode, the duty cycle
value of each of the four modulation sub-cycles is shown in the following table.
Parameter
Modulation cycle i
(i=0~3)
AC (0~3)
i<AC
i³AC
DC (Duty Cycle)
DC+1
64
DC
64
6+2 Mode Modulation Cycle Values
The following diagram illustrates the waveforms associated with the 6+2 mode of PWM operation.
It is important to note how the single PWM cycle is subdivided into 4 individual modulation cycles,
numbered from 0~3 and how the AC value is related to the PWM value.
fS Y S /2
[P W M ] = 1 0 0
PW M
2 5 /6 4
2 5 /6 4
2 5 /6 4
[P W M ] = 1 0 1
PW M
2 6 /6 4
2 5 /6 4
2 5 /6 4
[P W M ] = 1 0 2
PW M
2 6 /6 4
2 6 /6 4
2 5 /6 4
[P W M ] = 1 0 3
PW M
2 6 /6 4
2 6 /6 4
P W M m o d u la tio n p e r io d : 6 4 /fS Y S
M o d u la tio n c y c le 0
M o d u la tio n c y c le 1
2 6 /6 4
M o d u la tio n c y c le 2
P W M c y c le : 2 5 6 /fS Y S
6+2 PWM Mode
2 5 /6 4
2 5 /6 4
2 5 /6 4
2 5 /6 4
M o d u la tio n c y c le 3
2 5 /6 4
2 6 /6 4
2 6 /6 4
2 6 /6 4
M o d u la tio n c y c le 0
b7
b0
P W M R e g is te r (6 + 2 ) M o d e
A C v a lu e
D C v a lu e
PWM Register for 6+2 Mode
Rev. 1.10
66
October 23, 2012
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