HT48R0662G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R0662G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
7+1 PWM Mode
Each full PWM cycle, as it is controlled by an 8-bit PWM register, has 256 clock periods. However, in
the 7+1 PWM mode, each PWM cycle is subdivided into two individual sub-cycles known as
modulation cycle 0 ~ modulation cycle 1, denoted as i in the table. Each one of these two sub-cycles
contains 128 clock cycles. In this mode, a modulation frequency increase of two is achieved. The 8-bit
PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into two
groups. The first group which consists of bit1~bit7 is denoted here as the DC value. The second group
which consists of bit0 is known as the AC value. In the 7+1 PWM mode, the duty cycle value of each of
the two modulation sub-cycles is shown in the following table.
Parameter
Modulation cycle i
(i=0~1)
AC (0~1)
i<AC
i³AC
DC (Duty Cycle)
DC+1
128
DC
128
7+1 Mode Modulation Cycle Values
The following diagram illustrates the waveforms associated with the 7+1 mode PWM operation. It is
important to note how the single PWM cycle is subdivided into 2 individual modulation cycles,
numbered 0 and 1 and how the AC value is related to the PWM value.
fS Y S /2
[P W M ] = 1 0 0
PW M
[P W M ] = 1 0 1
PW M
[P W M ] = 1 0 2
PW M
[P W M ] = 1 0 3
PW M
5 0 /1 2 8
5 0 /1 2 8
5 1 /1 2 8
5 0 /1 2 8
5 1 /1 2 8
5 1 /1 2 8
5 2 /1 2 8
P W M m o d u la tio n p e r io d : 1 2 8 /fS Y S
M o d u la tio n c y c le 0
P W M c y c le : 2 5 6 /fS Y S
5 1 /1 2 8
M o d u la tio n c y c le 1
7+1 PWM Mode
5 0 /1 2 8
5 1 /1 2 8
5 1 /1 2 8
5 2 /1 2 8
M o d u la tio n c y c le 0
b7
b0
P W M R e g is te r (7 + 1 ) M o d e
A C v a lu e
D C v a lu e
PWM Register for 7+1 Mode
Rev. 1.10
67
October 23, 2012
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