HT49C10-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49C10-1' PDF : 38 Pages View PDF
HT49R10A-1/HT49C10-1
Bit No.
0~2
3
4
5
6
7
Label
¾
TE
TON
TS
TM0
TM1
Function
Unused bit, read as ²0²
Defines the TMR active edge of the timer/event counter:
In Event Counter Mode (TM1,TM0)=(0,1):
1:count on falling edge;
0:count on rising edge
In Pulse Width measurement mode (TM1,TM0)=(1,1):
1: start counting on the rising edge, stop on the falling edge;
0: start counting on the falling edge, stop on the rising edge
To enable/disable timer counting
(0=disabled; 1=enabled)
2 to 1 multiplexer control inputs to select the timer/event counter clock source
(0=RTC outputs; 1= system clock or system clock/4)
To define the operating mode (TM1, TM0)
01= Event count mode (External clock)
10= Timer mode (Internal clock)
11= Pulse Width measurement mode (External clock)
00= Unused
TMRC (0EH) Register
Due to the timer/event scheme, the programmer should
pay special attention on the instruction to enable then
disable the timer for the first time, whenever there is a
need to use the timer/event function, to avoid unpredict-
able result. After this procedure, the timer/event function
can be operated normally.
Input/Output Ports
There are an 8-bit bidirectional input/output port and a
2-bit input port in the device, labeled PA, PB which are
mapped to [12H], [14H] of the RAM, respectively.
PA0~PA3 can be configured as CMOS (output) or
NMOS (input/output) with or without pull-high resistor by
configuration options. PA4~PA7 always have pull-high re-
sistors and are NMOS (input/output).
If NMOS (input) is chosen, each pin on the port
(PA0~PA7) can be configured as a wake-up input. PB
can only be used for input operation. All the ports for the
input operation (PA, PB), are non-latched, that is, the in-
puts should be ready at the T2 rising edge of the instruc-
tion ²MOV A, [m]² (m=12H or 14H).
For PA output operation, all data is latched and remains
unchanged until the output latch is rewritten.
When the PA structures are open drain NMOS type, it
should be noted that, before reading data from the pads,
a ²1² should be written to the related bits to disable the
NMOS device. That is executing first the instruction
²SET [m].i² (i=0~7 for PA) to disable the related NMOS
device, and then executing a ²MOV A, [m]² to get stable
data.
After a chip reset, these input lines remain at a high level
or are left floating (by configuration options). Each pin of
these output latches can be set or cleared by the ²MOV
[m], A² (m=12H) instruction.
Some instructions first input data and then follow the
output operations. For example, ²SET [m].i², ²CLR
[m].i², ²CPL [m]², ²CPLA [m]² read the entire port states
into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or to the accumulator. When a PA line is used as
an I/O line, the related PA line options should be config-
ured as NMOS with or without pull-high resistor. Once a
PA line is selected as a CMOS output, the I/O function
cannot be used.
The input state of a PA line is read from the related PA
pad. When PA is configured as NMOS with or without
pull-high resistors, one should be careful when applying a
read-modify-write instruction to PA. Since the read-mod-
ify-write will read the entire port state (pads state) firstly,
execute the specified instruction and then write the result
to the port data register. When the read operation is exe-
cuted, a fault pad state (caused by the load effect or float-
ing state) may be read. Errors will then occur.
There are three function pins that share with the PA port:
PA0/BZ, PA1/BZ and PA3/PFD.
The BZ and BZ are buzzer driving output pair and the
PFD is a programmable frequency divider output. If the
user wants to use the BZ/BZ or PFD function, the related
PA port should be set as a CMOS output. The buzzer
output signals are controlled by PA0 and PA1 data regis-
ters as defined in the following table.
PA1 Data
Register
0
1
X
PA0 Data
Register
0
0
1
PA0/PA1 Pad State
PA0=BZ, PA1=BZ
PA0=BZ, PA1=0
PA0=0, PA1=0
Note: ²X² stands for unused
Rev. 1.50
17
July 30, 2012
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