HT49CA1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49CA1' PDF : 58 Pages View PDF
HT49RA1/HT49CA1
Timer/Event Counters
The provision of timers form an important part of any
microcontroller, giving the designer a means of carrying
out time related functions. The devices contain one
8-bit and one 16-bit count-up timers. As each timer has
three different operating modes, they can be configured
to operate as a general timer, an external event counter
or as a pulse width measurement device.
There are two types of registers related to the
Timer/Event Counters. The first is the register that con-
tains the actual value of the timer and into which an ini-
tial value can be preloaded. Reading from this register
retrieves the contents of the Timer/Event Counter. The
second type of associated register is the Timer Control
Register which defines the timer options and deter-
mines how the timer is to be used. All devices can have
the timer clock configured to come from the internal
clock source. In addition, the timer clock source can also
be configured to come from an external timer pin.
Configuring the Timer/Event Counter Input Clock
Source
The internal timer¢s clock can originate from various
sources, depending upon which timer is chosen. The
system clock input timer source is used when the timer
is in the timer mode or in the pulse width measurement
mode.
An external clock source is used when the timer is in the
event counting mode, the clock source being provided
on an external timer pin TMR0 or TMR1, depending
upon which timer is used. Depending upon the condition
of the T0E or T1E bit, each high to low, or low to high
transition on the external timer pin will increment the
counter by one.
Timer Registers - TMR0, TMR1H, TMR1L
The timer registers are special function registers located in
the Special Purpose Data Memory and is the place where
the actual timer value is stored. These registers are known
as TMR0, TMR1H or TMR1L, depending upon which de-
vice is used. The value in the timer registers increases by
one each time an internal clock pulse is received or an ex-
ternal transition occurs on the external timer pin. The timer
will count from the initial value loaded by the preload regis-
ter to the full count of FFH or FFFFH at which point the
timer overflows and an internal interrupt signal is gener-
ated. The timer value will then be reset with the initial
preload register value and continue counting.
Note that to achieve a maximum full range count of FFH
or FFFFH, the preload register must first be cleared to
all zeros. It should be noted that after power-on, the
preload registers will be in an unknown condition. Note
that if the Timer/Event Counters are in an OFF condition
and data is written to their preload registers, this data
will be immediately written into the actual counter. How-
ever, if the counter is enabled and counting, any new
data written into the preload data registers during this
period will remain in the preload registers and will only
be written into the actual counter the next time an over-
flow occurs.
D a ta B u s
fS Y S
fS Y S /4
R T C In te rru p t
O p tio n
M
S e le c t
U
X
T0S
TM R 0
T0E
T0M 1 T0M 0
R e lo a d
P r e lo a d R e g is te r
T im e r /E v e n t C o u n te r
M o d e C o n tro l
T0O N
T im e r /E v e n t
C o u n te r
8 - B it T im e r /E v e n t C o u n te r
Timer/Event Counter 0 Structure
O v e r flo w
to In te rru p t
D a ta B u s
L o w B y te
B u ffe r
fS Y S /4
M
32768H z
U
X
T1S
TM R 1
T1E
T1M 1
T1M 0
1 6 - B it
P r e lo a d R e g is te r
R e lo a d
T im e r /E v e n t C o u n te r
M o d e C o n tro l
T1O N
H ig h B y te L o w B y te
1 6 - B it T im e r /E v e n t C o u n te r
O v e r flo w
to In te rru p t
Timer/Event Counter 1 Structure
Rev. 1.10
24
March 30, 2014
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