HT56R666 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT56R666' PDF : 104 Pages View PDF
HT56R66/HT56R666
Device
No. of 8-bit Timers
Timer Name
Timer Register Name
Control Register Name
No. of 16-bit Timers
Timer Name
Timer Register Name
Control Register Name
All Devices
3
Timer/Event Counter 0
Timer/Event Counter 2
Timer/Event Counter 3
TMR0
TMR2
TMR3
TMR0C
TMR2C
TMR3C
1
Timer/Event Counter 1
TMR1L/TMR1H
TMR1C
Timer Registers - TMR0, TMR1L/TMR1H,
TMR2, TMR3
The timer registers are special function registers located in
the Special Purpose Data Memory and is the place where
the actual timer value is stored. For the 8-bit Timer/Event
Counters, these registers are known as TMR0, TMR2 or
TMR3. For the 16-bit Timer/Event Counter, a pair of regis-
ters are required and are known as TMR1L/TMR1H. The
value in the timer registers increases by one each time an
internal clock pulse is received or an external transition oc-
curs on the external timer pin. The timer will count from the
initial value loaded by the preload register to the full count
of FFH for the 8-bit timer or FFFFH for the 16-bit timer at
which point the timer overflows and an internal interrupt
signal is generated. The timer value will then be reset with
the initial preload register value and continue counting.
To achieve a maximum full range count of FFH for the
8-bit timer or FFFFH for the 16-bit timer, the preload reg-
isters must first be cleared to all zeros. It should be
noted that after power-on, the preload register will be in
an unknown condition. Note that if the Timer/Event
Counter is switched off and data is written to its preload
registers, this data will be immediately written into the
actual timer registers. However, if the Timer/Event
Counter is enabled and counting, any new data written
into the preload data registers during this period will re-
main in the preload registers and will only be written into
the timer registers the next time an overflow occurs.
For the 16-bit Timer/Event Counter which has both low
byte and high byte timer registers, accessing these reg-
isters is carried out in a specific way. It must be noted
when using instructions to preload data into the low byte
timer register, the data will only be placed in a low byte
buffer and not directly into the low byte timer register.
The actual transfer of the data into the low byte timer
register is only carried out when a write to its associated
high byte timer register, namely TMR1H, is executed.
On the other hand, using instructions to preload data
into the high byte timer register will result in the data be-
ing directly written to the high byte timer register. At the
same time the data in the low byte buffer will be trans-
ferred into its associated low byte timer register. For this
reason, the low byte timer register should be written first
when preloading data into the 16-bit timer registers. It
must also be noted that to read the contents of the low
byte timer register, a read to the high byte timer register
must be executed first to latch the contents of the low
byte timer register into its associated low byte buffer. Af-
ter this has been done, the low byte timer register can be
read in the normal way. Note that reading the low byte
timer register will result in reading the previously latched
contents of the low byte buffer and not the actual con-
tents of the low byte timer register.
Timer Control Registers -
TMR0C, TMR1C, TMR2C, TMR3C
The flexible features of the Holtek microcontroller
Timer/Event Counters enable them to operate in three
different modes, the options of which are determined by
the contents of their respective control register.
It is the Timer Control Register together with its corre-
sponding timer registers that control the full operation of
the Timer/Event Counters. Before the timers can be
used, it is essential that the appropriate Timer Control
Register is fully programmed with the right data to en-
sure its correct operation, a process that is normally car-
ried out during program initialisation.
To choose which of the three modes the timer is to oper-
ate in, either in the timer mode, the event counting mode
or the pulse width measurement mode, bits 7 and 6 of
the corresponding Timer Control Register, which are
known as the bit pair TnM1/TnM0, must be set to the re-
quired logic levels. The timer-on bit, which is bit 4 of the
Timer Control Register and known as TnON, depending
upon which timer is used, provides the basic on/off con-
trol of the respective timer. Setting the bit high allows the
counter to run, clearing the bit stops the counter. For tim-
ers that have prescalers, bits 0~2 of the Timer Control
Register determine the division ratio of the input clock
prescaler. The prescaler bit settings have no effect if an
external clock source is used. If the timer is in the event
count or pulse width measurement mode, the active
transition edge level type is selected by the logic level of
bit 3 of the Timer Control Register which is known as
TnE. An additional TnS bit in the 16-bit Timer/Event
Counter control register is used to determine the clock
source for the Timer/Event Counter.
Rev. 1.40
41
May 11, 2012
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