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ICS1893CFILF View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS1893CFILF
ICST
Integrated Circuit Systems ICST
'ICS1893CFILF' PDF : 126 Pages View PDF
ICS1893CF Data Sheet - Release
Chapter 9 DC and AC Operating Conditions
9.5.12 10M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
Table 9-19 lists the significant time periods for the 10M MII carrier assertion/de-assertion during half-duplex
transmission. The time periods consist of timings of signals on the following pins:
TXEN
TXCLK
CRS
Figure 9-13 shows the timing diagram for the time periods.
Table 9-19. 10M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Time
Period
Parameter
t1 TXEN Asserted to CRS Assert
t2 TXEN De-Asserted to CRS De-Asserted
Condi- Min.
tions
0
0
Typ.
2
Max. Units
2 Bit times
4 Bit times
Figure 9-13. 10M MII Carrier Assertion/De-Assertion Timing Diagram
(Half-Duplex Transmission Only)
t2
TXEN
TXCLK
CRS
t1
ICS1893CF, Rev. F, 03/01/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
114
Mar. 2007
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