ICS552-03 View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS552-03' PDF : 6 Pages View PDF
ICS552-03
LOW SKEW 1 TO 8 CLOCK BUFFER (4 AT 1X, 4 AT 1/2X)
AC Electrical Characteristics (continued)
VDD = 3.3V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ.
Input Frequency
0
Output Rise Time
Output Fall Time
Propagation Delay
tOR 0.8 to 2.0 V, CL=15 pF
1.0
tOF 2.0 to 0.8 V, CL=15 pF
1.0
Note 1
5
Output to output skew. Between Note 2 Rising edges at VDD/2
0
any two Q outputs
Output to output skew. Between Note 2 Rising edges at VDD/2
0
any two P outputs
Output to output skew. Between Note 2 Rising edges at VDD/2
0
any P to any Q output
Input A to Input B skew
Note 3
0
Max.
200
50
50
100
50
Units
MHz
ns
ns
ns
ps
ps
ps
ps
VDD = 5.0V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
0
160 MHz
Output Rise Time
Output Fall Time
Propagation Delay
tOR
tOF
Note 1
0.8 to 2.0 V, CL=15 pF
2.0 to 0.8 V, CL=15 pF
0.7
ns
0.7
ns
4
ns
Output to output skew. Between Note 2 Rising edges at VDD/2
any two Q outputs
0
50
ps
Output to output skew. Between Note 2 Rising edges at VDD/2
any two P outputs
0
50
ps
Output to output skew. Between Note 2 Rising edges at VDD/2
any P to any Q output
0 100 ps
Input A to Input B skew
Note 3
0
50
ps
Notes: 1. With rail to rail input clock
2. Between any two outputs with equal loading
3. Propagation delay matching through the part
4. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock
generators.
MDS 552-03 B
5
Revision 052501
Integrated Circuit Systems q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q www.icst.com
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