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ICS580M-01T View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS580M-01T
ICST
Integrated Circuit Systems ICST
'ICS580M-01T' PDF : 6 Pages View PDF
1 2 3 4 5 6
ICS580-01
Glitch-Free Clock Multiplexer
Device Operation and Applications
The ICS580-01 consists of a glitch free mux between INA and INB controlled by SELB. The device is
designed to switch between 2 clocks, whether running or not. In the first example, clocks are running on
both INA and INB. When SELB changes, the output clock goes low after 3 cycles of the output clock
(nominally). The output then stays low for 3 cycles of the new input clock (nominally) and then starts with
the new input clock. This is shown in Figure 1.
Figure 1
INA
INB
SELB
CLK1, 2
In the second example, one of the inputs was selected and running but has since stopped (either high or low).
This is indicated by either NO_INA or NO_INB going high depending on whether INA or INB has
stopped. These signals go high following a selectable time-out period after the clock has stopped. The
timeout period is determined by the DIV input pin. The SELB pin is now changed to select the new input
clock which is running. The output clock immediately goes low and stays low for 3 cycles of the new input
clock and then starts with the new input clock. Figure 2 shows an example of this.
Figure 2
INA
INB
SELB
NO_INA
Timeout
CLK1, 2
MDS 580-01 A
3
Revision 030300
Printed 11/28/00
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