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ICS8344BYT View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS8344BYT
ICST
Integrated Circuit Systems ICST
'ICS8344BYT' PDF : 15 Pages View PDF
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8344
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 5B. AC ELECTRICAL CHARACTERISTICS, VDDI = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX Maximum Input Frequency
167
MHz
VPP
Peak-to-Peak Input Voltage
f = 167MHz
0.3
1.3
V
VCMR Common Mode Input Voltage
f = 167MHz
0.9
2
V
tpLH Propagation Delay, Low-to-High
0MHz f 167MHz
2.6
tpHL Propagation Delay, High-to-Low
0MHz f 167MHz
2.6
4.5
ns
4.2
ns
tsk(b) Bank Skew; NOTE 2
Measured on the rising edge of
VDDO/2
150
ps
tsk(o) Output Skew; NOTE 3
Measured on the rising edge of
VDDO/2
275
ps
tsk(pp) Part-to-Part Skew; NOTE 4
Measured on the rising edge of
VDDO/2
600
ps
tR
Output Rise Time; NOTE 5
30% to 70%
300
1700
ps
tF
Output Fall Time; NOTE 5
30% to 70%
300
1400
ps
tPW
Output Pulse Width
0MHz f 167MHz
f = 167MHz
tCYCLE/2
- 0.65
tCYCLE/2
tCYCLE/2
+ 0.65
ns
2.35
3.65
ns
tEN
Output Enable Time; NOTE 5
f = 66.7MHz
6
ns
tDIS
Output Disable TIme; NOTE 5
f = 66.7MHz
6
ns
NOTE 1: All parameters measured at 167MHz and VPPmin unless noted otherwise.
All outputs terminated with 50to VDDO/2.
NOTE 2: Defined as skew within a bank of outputs at the same voltages and with equal load conditions.
NOTE 3: Defined as skew across banks of outputs at the same supply voltages and with equal load conditions.
NOTE 4: Defined as the skew at different outputs on different devices operating at the same supply voltages
with equal load conditions.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
8344
www.icst.com
7
REV. B FEBRUARY 2, 2001
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