ICS83905AMLFT View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
MFG CO.
'ICS83905AMLFT' PDF : 19 Pages View PDF
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
LAYOUT GUIDELINE
Figure 5 shows an example of ICS83905 application schematic.
In this example, the device is operated at VDD = 3.3V and VDDO =
3.3V. The decoupling capacitors should be located as close as
possible to the power pins. The input is driven by an 18pF load
resonant quartz crystal. The tuning capacitors (C1, C2) are fairly
accurate, but minor adjustments might be required. For the
LVCMOS output drivers, two termination examples are shown in
the schematic. For additional termination, examples are shown
in the LVCMOS Termination Application Note.
CL = 18 pf
VDDO = 3.3V
VDD = 3.3V
R2
31 Zo = 50 Ohm
C2
15pf
U1
C1
15pF
LVCMOS
ENABLE 2
VDDO
1
2 XTAL_OUT
3
4
5
6
ENABLE 2
GND
BCLK0
VDDO
7
8
BCLK1
GND
BCLK2
ICS83905
16
XTAL_IN 15
ENABLE 1
BCLK5
VDDO
BCLK4
14
13
12
11
GND
BCLK3
VDD
10
9
ENABLE 1
VDD
R3
100
Zo = 50 Ohm
R4
100
LVCMOS
VDD
C3
10uF
C4
.1uF
VDDO
C5
.1uF
C6
.1uF
Optional Termination
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
FIGURE 5. SCHEMATIC OF RECOMMENDED LAYOUT
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
13
ICS83905AM REV. B JULY 9, 2007
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