Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840008-01
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL
FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 13, 19
2, 10, 12
VDDO
nc
Power
Unused
Output supply pins.
No connect.
3,
4
XTAL_OUT,
XTAL_IN
Input
Crystal interface. XTAL_OUT is the output,
XTAL_IN is the input.
5
VDDA
Power
Analog supply pin.
6
OE
Input Pullup Output enable. LVCMOS/LVTTL interface levels
Active HIGH Master Reset. When logic HIGH, the internal dividers are
7
MR
Input Pulldown reset causing the true outputs to go low. When logic LOW, the internal
dividers and the outputs are enabled. LVCMOS/LVTTL interface levels.
Selects between the PLL and XTAL as the input to the dividers.
8
nPLL_SEL Input Pulldown When HIGH, selects XTAL. When LOW, selects PLL.
LVCMOS/LVTTL interface levels.
9
11, 16, 22
VDD
GND
Power
Power
Core supply pin.
Power supply ground.
14, 15, 17,
18, 20, 21,
23, 24
Q7, Q6, Q5,
Q4, Q3, Q2,
Q1, Q0
Ouput
Single-ended outputs.15Ω impedance.
LVCMOS/LVTTL interface levels.
NOTE: Pulldown and Pullup refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
CIN
Input Capacitance
CPD
Power Dissipation Capacitance
RPULLUP Input Pullup Resistor
RPULLDOWN Input Pulldown Resistor
ROUT
Output Impedance
Test Conditions
VDDO = 3.63V
VDDO = 2.625V
V = 1.89V
DDO
VDDO = 3.63V or 2.625V
VDDO = 1.89V
Minimum
Typical
4
TBD
TBD
TBD
51
51
15
TBD
Maximum
Units
pF
pF
pF
pF
KΩ
KΩ
Ω
Ω
840001AR-01
www.icst.com/products/hiperclocks.html
2
REV. A APRIL 7, 2005