ICS840008-01 View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS840008-01' PDF : 13 Pages View PDF
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840008-01
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL
FREQUENCY SYNTHESIZER
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±10%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fOUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 3
125
160
TBD
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 2
Integration Range:
1.875MHz - 20MHz
0.52
tL
tR / tF
odc
PLL Lock Time
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
TBD
550
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot which will follow the AC Characteristics Tables.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
MHz
ps
ps
ms
ps
%
TABLE
5B.
AC
CHARACTERISTICS,
V
DD
=
V
DDA
=
3.3V±10%,
V
DDO
=
2.5V±5%,
TA
=
0°C
TO
70°C
Symbol Parameter
Test Conditions
Minimum Typical
fOUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 3
125
TBD
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 2
Integration Range:
1.875MHz - 20MHz
0.53
tL
tR / tF
odc
PLL Lock Time
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
TBD
600
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot which will follow the AC Characteristics Tables.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
160
Units
MHz
ps
ps
ms
ps
%
TABLE 5C. AC CHARACTERISTICS, VDD = VDDA = 3.3V±10%, VDDO = 1.8V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
fOUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 3
125
TBD
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 2
Integration Range:
1.875MHz - 20MHz
0.49
tL
tR / tF
odc
PLL Lock Time
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
TBD
630
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot which will follow the AC Characteristics Tables.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
160
Units
MHz
ps
ps
ms
ps
%
840008AR-01
www.icst.com/products/hiperclocks.html
5
REV. A APRIL 7, 2005
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