ICSSSTUAF32868B View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
MFG CO.
'ICSSSTUAF32868B' PDF : 22 Pages View PDF
ICSSSTUAF32868B
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
Parity Logic Diagram
M2
RESET
CLK L1
CLK M1
D1-D5, D7,
D9-D12,
D17-D28
22
VREF A5, AB5
PAR_IN L3
DCS0
K1
CSGEN L2
DCS1
J1
D1-D5, D7,
D9-D12,
D17-D28
22
D
CK Q
R
CE
D
CK Q
R
CE
D1-D5, D7,
D9-D12,
D17-D28
22
22
D1-D5, D7,
D9-D12,
D17-D28
Parity Generator
and
Error Check
D
CK Q
R
Q1A-Q5A, Q7A,
22
Q9A-Q12A,
Q17A-Q28A
22 Q1B-Q5B, Q7B,
Q9B-Q12B,
Q17B-Q28B
M3 QERR
K2 QCS0A
L7 QCS0B
D
CK Q
R
J2 QCS1A
L8 QCS1B
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
3
ICSSSTUAF32868B
7102/2
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