ICSSSTUAF32868B View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
MFG CO.
'ICSSSTUAF32868B' PDF : 22 Pages View PDF
ICSSSTUAF32868B
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
Parity Logic Diagram
M2
RESET
CLK L1
CLK M1
D1-D12,
D17-D20,
D22,
D24-D28
22
VREF A5, AB5
PAR_IN L3
DCS0 N1
CSGEN L2
DCS1
P1
D1-D12,
D17-D20, D22,
D24-D28
22
D
CK Q
R
CE
D
CK Q
R
CE
D1-D12,
D17-D20, D22,
D24-D28
22
22 D1-D12,
D17-D20, D22,
D24-D28
Parity Generator
and
Error Check
D
CK Q
R
Q1A-Q12A,
22 Q17A-Q20A,
Q22A,
Q24A-Q28A
Q1B-Q12B,
22 Q17B-Q20B,
Q22B,
Q24B-Q28B
M3 QERR
N2 QCS0A
M7 QCS0B
D
CK Q
R
P2 QCS1A
M8 QCS1B
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
5
ICSSSTUAF32868B
7102/2
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