IR3Y48M View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'IR3Y48M' PDF : 31 Pages View PDF
Gain Control Circuit
The total gain for CCD input signal covers from 0 to
36 dB.
This range consists of CDS (0 to 12 dB (6 dB/
step)), AGC rough (0 to 18 dB (6 dB/step)), and
AGC fine (0 to 6 dB (0.094 dB/step)). Total gain is
IR3Y48M
controlled (as described below) by 9-bit gain control
register. The gain is fixed to maximum gain when
the code exceeds 382 (decimal).
The gain of ADIN (which bypassing CDS) is 0 to
24 dB.
35.91 dB
0.094 dB
1 step
0 dB
0D
CDS
6 dB/step
(0 to 12 dB)
383D
AGC Block
Rough
6 dB/step
(0 to 18 dB)
Fine
0.094 dB/step
(0 to 6 dB)
Total Gain = 0 to 35.91 dB
Gain Control
10
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