IT8673F
10. Configuration
10.1 Configuring Sequence Description
After the hardware reset or power-on reset, IT8673F enters the normal mode with all logical devices
disabled except KBC. The initial state (enable bit) of this logical device (KBC) is determined by the state of
pin 63 (DTR2# ) at the falling edge of the system reset during power-on reset.
Hardware Reset
Wait for key string
Any other I/O transition
cycle
I/O write to 279h
N
Is the key port
selected?
Y
N
Are the four
consecutive bytes
correct?
Y
Save the I/O port as
configuration port
N
I/O write
to Configuration
Address Port?
N
Y
N
Does the data match
first key?
Y
Wait for the next key
N
Does the data
match next key?
Y
Does the data
N
match last key?
Y
MB PnP Mode
Figure 10-1. Configuration Sequence Flow Chart
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