IT8673F View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
MFG CO.
'IT8673F' PDF : 128 Pages View PDF
10.7.3 Parallel Port Primary Base Address LSB Register (Index=61h, Default=78h)
If bit 2 is set to 1, the EPP mode is disabled automatically.
Bit
Description
7-2 Read/write, mapped as Base Address[7:2].
1-0 Read only as “00b”.
IT8673F
10.7.4 Parallel Port Secondary Base Address MSB Register (Index=62h, Default=07h)
Bit
Description
7-4 Read only as “0h” for Base Address[15:12].
3-0 Read/write, mapped as Base Address[11:8].
10.7.5 Parallel Port Secondary Base Address LSB Register (Index=63h, Default=78h)
Bit
Description
7-2 Read/write, mapped as Base Address[7:2].
1-0 Read only as “00b”.
10.7.6 Parallel Port Interrupt Level Select (Index =70h, Default=07h)
Bit
Description
7-4 Reserved with default “0h”.
3-0 Select the interrupt level note1 for Parallel Port.
10.7.7 Parallel Port DMA Channel Select (Index=74h, Default=03h)
Bit
Description
7-3 Reserved with default “00h.”
2-0 Select the DMA channel note2 for Parallel Port.
10.7.8 Parallel Port Special Configuration Register (Index=F0h, Default=03h)
Bit
7-3 Reserved
1 : IRQ sharing.
2
0 : Normal.
Parallel Port mode
00 : Standard Parallel Port mode (SPP)
1-0 01 : EPP mode
10 : ECP mode
11 : EPP mode and ECP mode
Description
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