JS28F128P30BF65A View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
JS28F128P30BF65A
Numonyx -> Micron
'JS28F128P30BF65A' PDF : 90 Pages View PDF
P30-65nm SBC
Figure 15: Reset Operation Waveforms
(A) Reset during
read mode
(B) Reset during
program or block erase
P1 ≤ P2
(C) Reset during
program or block erase
P1 ≥ P2
(D) VCC Power-up to
RST# high
VIH
RST# [P]
VIL
VIH
RST# [P]
VIL
VIH
RST# [P]
VIL
VCC
VCC
0V
P1
R5
Abort
P2
Complete
R5
Abort
P2 Complete
R5
P3
12.3
Power Supply Decoupling
Flash memory devices require careful power supply de-coupling. Three basic power
supply current considerations are: 1) standby current levels; 2) active current levels;
and 3) transient peaks produced when CE# and OE# are asserted and deasserted.
When the device is accessed, many internal conditions change. Circuits within the
device enable charge-pumps, and internal logic states change at high speed. All of
these internal activities produce transient signals. Transient current magnitudes depend
on the device outputs’ capacitive and inductive loading. Two-line control and correct
de-coupling capacitor selection suppress transient voltage peaks.
Because flash memory devices draw their power from VCC, VPP, and VCCQ, each power
connection should have a 0.1 µF ceramic capacitor to ground. High-frequency,
inherently low-inductance capacitors should be placed as close as possible to package
leads.
Additionally, for every eight devices used in the system, a 4.7 µF electrolytic capacitor
should be placed between power and ground close to the devices. The bulk capacitor is
meant to overcome voltage droop caused by PCB trace inductance.
Datasheet
44
Apr 2010
Order Number: 208033-02
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