KB2511B View Datasheet(PDF) - Samsung
Part Name
Description
MFG CO.
'KB2511B' PDF : 35 Pages View PDF
KB2511B
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
2
V-SYNC
SYNCHRO
POLARITY
CHARGE CURRENT
TRANSCONDUCTANCE
AMPLIFIER
DISCH.
OSCILLATOR
-
22 +
OSC
CAP
REF
SAMPLING 20
SAMP
CAP
S CORRECTION
VS_AMP
SUB07/8bits
COR-C
SUB08/6bits
C CORRECTION
+-
Vlow
Switch
Dlech
Figure 18. AGC Loop Block Diagram
23 VOUT
18 BREATH
VERT_AMP
SUB05/7BITS
VMOIRE
SUB0C/5BITS
VOSITION
SUB06/7BITS
I2C Control Adjustments
Then, S and C correction shapes can be added to this ramp. This frequency independent S and C corrections are
generated internally. Their amplitude are adjustable by their respective I2C register. They can also be inhibited by
their select bit. Endly, the amplitude of this S and C corrected ramp can be adjusted by the vertical ramp amplitude
control register. The adjusted ramp is available on pin 23 (VOUT) to drive an external power stage. The gain of this
stage is typically 25% depending on its register value. The mean value of this ramp is driven by its own I2C register
(vertical position). Its value is VPOS = 7/16 • VREF ± 300mV.
Usually VOUT is sent through a resistive divider to the inverting input of the booster. Since VPOS derives from
VREF-V, the bias voltage sent to the non-inverting input of booster should also derive from VREF-V to optimize the
accuracy(see Application Diagram).
Basic Equations
In first approximation, the amplitude of the ramp on pin 23 (Vout) is:
VOUT - VPOS = ( VOSC - VDCMID ) • ( 1 + 0.25 (VAMP) )
with:
- VDCMID = 7/16•VREF( typically 3.5V, the middle value of the ramp on pin 22)
- VOSC = V22 ( ramp with fixed amplitude)
- VAMP = - 1 for minimum vertical amplitude register value and +1 for maximum
- VPOS is calculated by : VPOS = VDCMID + 0.3Vp with Vp equals -1 for minimum vertical position register value
and +1 for maximum
The current available on Pin 22 is :
IOSC
=
3
8
• VREF • COSC • f
32
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