KB2514 View Datasheet(PDF) - Samsung
Part Name
Description
MFG CO.
'KB2514' PDF : 55 Pages View PDF
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
KB2514
Registers
V-AMP Control
Registers - 5
(Row 16,
Column 05)
Tabel 4. Register Description (Continued)
Bits
HG3 ~ HB3
(BitA ~ 8)
Description
HG3 ~ HB3 bits select OSD raster color 3 to be half tone.
To carry out half tone function, set the HT bit to '1'.
OSD
HG3 HR3 HB3
G
R
B
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
0
0
0
1
0
0
0
0
1
1
0
1
0
1
0
1
1
0
0
1
1
1
1
1
Raster
Color 3
Black
Blue
Red
Magenta
Green
Cyan
Yellow
White
POR
O
CS2 ~ CS1
(BitC ~ B)
Cut-off offset current control
CS2
0
0
1
1
CS1
0
1
0
1
Cut-off Offset Current
100µA
150µA
0µA
50µA
POR
O
BLKP
(Bit D)
CLPP
(Bit E)
CLPS
(Bit F)
Polarity of horizontral fly back signal
If this bit is '0', HFLB’s polarity is negative, and if '1', it is positive.
Polarity of clamp pulse signal
If this bit is '0', CLP’s polarity is positive, and if '1', it is negative.
This bit has meaning only if the CLPS bit is set to '1'.
Clamp pulse generation enable
If this bit is '0', clamp signal is made using the HFLB signal, so there is
no need to supply the clamp signal.
and if '1' you must supply external clamp signal.
31
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