DEVICES INCORPORATED
FIGURE 4A. FTAB = 0, FTF = 0
From
Clock
Clock
C0
S4-S0
A, B
C0
S4-S0
ENA, ENB, ENF
Minimum cycle time
To
©F
© Other
© Other
© Other
Setup time
Setup time
Setup time
Setup time
A31-A16
B31-B16
D
D
Q
Q
A
B
F
C0
MOST
SIGNIFICANT
SLICE
D
Q
16
CLOCK
F31-F16
L4C383
16-bit Cascadable ALU (Extended Set)
Calculated Specification Limit
= Same as 16-bit case
= (Clock © C16) + (C0 © Out)
= (C0 © C16) + (C0 © Out)
= (S4-S0 © C16) + (C0 © Out)
= Same as 16-bit case
= (C0 © C16) + (C0 Setup time)
= (S4-S0 © C16) + (C0 Setup time)
= Same as 16-bit case
= (Clock © C16) + (C0 Setup time)
A15-A0
B15-B0
D
D
Q
Q
A
B
C16
F
C0
CLOCK
C0, S4–S 0
D
Q
16
F15-F0
CLOCK
LEAST
SIGNIFICANT
SLICE
FIGURE 4B. FTAB = 0, FTF = 1
From
Clock
Clock
C0
C0
S4-S0
S4-S0
A, B
C0
S4-S0
ENA, ENB, ENF
Minimum cycle time
To
©F
© Other
©F
© Other
©F
© Other
Setup time
Setup time
Setup time
Setup time
MOST
SIGNIFICANT
SLICE
A31-A16
B31-B16
D
D
Q
Q
A
B
F
C0
16
F31-F16
Calculated Specification Limit
= (Clock © C16) + (C0 © F)
= (Clock © C16) + (C0 © Out)
= (C0 © C16) + (C0 © F)
= (C0 © C16) + (C0 © Out)
= (S4-S0 © C16) + (C0 © F)
= (S4-S0 © C16) + (C0 © Out)
= Same as 16-bit case
= (C0 © C16) + (C0 Setup time)
= (S4-S0 © C16) + (C0 Setup time)
= Same as 16-bit case
= (Clock © C16) + (C0 Setup time)
A15-A0
B15-B0
D
D
Q
Q
A
B
C16
F
C0
16
F15-F0
CLOCK
C0, S4–S 0
LEAST
SIGNIFICANT
SLICE
Arithmetic Logic Units
3
08/16/2000–LDS.383-E