Circuit description
L6228Q
4.2
Logic inputs
Pins CONTROL, HALF/FULL, CLOCK, RESET and CW/CCW are TTL/CMOS and
microcontroller compatible logic inputs. The internal structure is shown in Figure 9. Turn-on
and turn-off threshold typical values are respectively V = th(ON) 1.8 V and V = th(OFF) 1.3 V.
Pin EN (Enable) has identical input structure with the exception that the drain of the
overcurrent and thermal protection MOSFET is also connected to this pin. Due to this
connection, this pin has to be driven carefully. The EN input may be driven in one of two
configurations as shown in Figure 10 or Figure 11. If driven by an open drain (collector)
structure, a pull-up resistor REN and a capacitor CEN are connected as shown in Figure 10.
If the driver is a standard Push-Pull structure the resistor REN and the capacitor CEN are
connected as shown in Figure 11. The resistor REN should be chosen in the range from 2.2
kΩ to 180 kΩ. REN and CEN recommended values are respectively 100 kΩ and 5.6 nF.
Figure 9. Logic input internal structure
5V
ESD
PROTECTION
Figure 10. EN pin open collector driving
D01IN1329
OPEN
COLLECTOR
OUTPUT
5V
REN
EN
CEN
ESD
PROTECTION
5V
D01IN1330
Figure 11. EN pin push-pull driving
PUSH-PULL
REN
EN
OUTPUT
CEN
ESD
PROTECTION
5V
D01IN1331
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Doc ID 14321 Rev 5