L6228Q View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'L6228Q' PDF : 32 Pages View PDF
L6228Q
Circuit description
4.3
PWM current control
The L6228Q includes a constant off-time PWM current controller for each of the two
bridges. The current control circuit senses the bridge current, by monitoring the voltage drop
across an external sense resistor connected between the source of the two lower power
MOSFET transistors and ground, as shown in Figure 12. As the current in the motor builds
up the voltage across the sense resistor increases proportionally. When the voltage drop
across, the sense resistor becomes greater than the voltage at the reference input (VREFA
or VREFB) the sense comparator triggers the monostable switching the bridge off. The
power MOSFETs remain off for the time set by the monostable and the motor current
recirculates as defined by the selected decay mode, described in the next section. When the
monostable times out, the bridge turns on again. Since the internal dead time, used to
prevent cross conduction in the bridge, delays the turn-on of the power MOSFET, the
effective off-time is the sum of the monostable time plus the dead time.
Figure 12. PWM current controller simplified schematic
TO GATE LOGIC
5mA
(0)
(1)
S
Q
R
-
5V
+
2.5V
COFF
RCA(or B)
ROFF
BLANKING TIME
MONOSTABLE
1μs
VSA (or B)
FROM THE
LOW-SIDE
GATE DRIVERS
MONOSTABLE
SET
BLANKER
DRIVERS
+
DEAD TIME
2H
DRIVERS
+
DEAD TIME
1H
IOUT
2 PHASE
STEPPER MOTOR
OUT2A(or B)
OUT1A(or B)
SENSE
COMPARATOR
+
COMPARATOR
-
OUTPUT
VREFA(or B)
2L
RSENSE
1L
SENSEA(or B)
D01IN1332
Figure 13 shows the typical operating waveforms of the output current, the voltage drop
across the sensing resistor, the RC pin voltage and the status of the bridge. More details
regarding the synchronous rectification and the output stage configuration are included in
the next section.
Immediately after the power MOSFET turns on, a high peak current flows through the
sensing resistor due to the reverse recovery of the freewheeling diodes. The L6228Q
provides a 1 μs blanking time tBLANK that inhibits the comparator output so that this current
spike cannot prematurely re-trigger the monostable.
Doc ID 14321 Rev 5
13/32
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