L6713A
Soft-start
Note:
16.1.1
Protections are active during soft-start, UVP is enabled after the reference reaches 0.6V
while OVP is always active with a fixed 1.24V threshold before VBOOT and with the threshold
coming from the VID (or the programmed VOVP) after VBOOT (See red-dashed line in
Figure 15).
If during T3 the programmed VID selects an output voltage lower than VBOOT, the output
voltage will ramp to the programmed voltage starting from VBOOT.
SS/LTB/AMD connections when using LTB™ gain = 2
SS/LTB/AMD pin sets then the output voltage dV/dt during soft-start according to the
resistor RSSOSC connected vs. SSEND/PGOOD pin through a signal diode(See Figure 16).
Figure 16. SS/LTBG/AMD connections for INTEL mode, when using LTB™ gain = 2
VPull-Up
SSEND/PGOOD
SS/LTBG/AMD
to SSEND Logic
RPull-Up
RSSOSC
RSSOSC[kΩ] = T2[μs] ⋅ 4.9783 ⋅ 10–2 ⋅
-1---.-2----4-----–----V----D----I--O----D----E---[--V-----]
1.24
TSS[μs]
=
⎧
⎪
1075[
μ
s]
+
⎪
⎨
⎪
⎪
⎩
R-----S----S---O----S---C----[---k---Ω-----]
5.3816 ⋅ 10–2
⋅
------------------1----.-2----4-------------------
1.24 – VDIODE[V]
⋅
VS
S
R-----S----S---O----S---C----[---k---Ω-----]
5.3816 ⋅ 10–2
⋅
------------------1----.-2----4-------------------
1.24 – VDIODE[V]
⋅
[VBOOT
+
(VBOOT
–
VSS)]
a)
b)
⎧
⎪ a)
⎨
⎪ b)
⎩
if(VSS > VBOOT)
if(VSS < VBOOT)
where TSS is the time spent to reach the programmed voltage VSS and RSSOSC the resistor
connected between SS/LTBG/AMD and SSEND (through a signal diode) in kΩ.
43/64